CAT25C series

Here are some features of CAT25C series. The CAT25C series has 10 mhz spi compatible, 1.8 to 6.0 volt operation, hardware and software protection, zero standby current, low power CMOS technology, SPI modes (0,0 &1,1), commercial, industrial and automotive, temperature ranges, active high or low reset outputs, precision power supply voltage monitoring, 5V, 3.3V, 3V and 1.8V Options, watchdog timer on CS, 1,000,000 program/erase cycles, 100 year data retention, self-timed write cycle, 8-pin DIP/SOIC, 16-pin SOIC and 14-pin TSSOP, page write buffer, block write protection, protect 1/4, 1/2 or all of E2PROM array, programmable watchdog timer, built-in inadvertent write protection, and VCC lock out.

Here are some design considerations of CAT25C series. The CAT25C series powers up in a write disable state and in a low power standby mode. A WREN instruction must be issued to perform any writes to the device after power up. Also,on power up CS should be brought low to enter a ready state and receive an instruction. After a successful byte/page write or status register write the CAT25C series goes into a write disable mode. CS must be set high after the proper number of clock cycles to start an internal write cycle. Access to the array during an internal write cycle is ignored and programming is continued. On power up,SO is in a high impedance. If an invalid op code is received, no data will be shifted into the CAT25C series, and the serial output pin (SO) will remain in a high impedance state until the falling edge of CS is detected again. The VCC sense provides write protection when VCC falls below the reset threshold value (VTH). The VCC lock out inhibits writes to the serial EEPROM whenever VCC falls below (power down) VTH or until VCC reaches the reset threshold (power up) VTH.