Position: Home  > All Categories> Integrated Circuits (ICs) > CD1283

CD1283

Features: High-speed, bidirectional, multi-protocol parallel port:•Hardware implementation of all modes of the IEEE STD (Standard) 1284 specification (including automatic negotiation)-Centronics-compatible mode-Reverse Byte mode-Reverse Nibble mode-ECP (extended capabilities port) mo...

product image

CD1283 Picture
See larger image
SeekIC No. : 004311036 Detail

CD1283: Features: High-speed, bidirectional, multi-protocol parallel port:•Hardware implementation of all modes of the IEEE STD (Standard) 1284 specification (including automatic negotiation)-Centroni...

CD1283 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
CD1283
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/4/28

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

High-speed, bidirectional, multi-protocol parallel port:
•Hardware implementation of all modes of the IEEE STD (Standard) 1284 specification (including automatic negotiation)
-Centronics-compatible mode
-Reverse Byte mode
-Reverse Nibble mode
-ECP (extended capabilities port) mode with run-length encoding/decoding
-EPP (enhanced parallel port) mode
-Up to 2-Mbytes/sec. transfer rate in ECP and EPP modes
•64-byte parallel FIFO with DMA interface
-64-byte FIFO can accommodate up to 4 Kbytes of compressed data with RLE (run-length encoded) compression enabled
•Supports peripheral-side operation
•Data and control input/output pads support IEEE STD1284 level-2 interface specification
•CPU bus interface
-High-speed slave DMA handshake interface
-Three clocks per word DMA transfers
-On-the-fly data compression using RLE (run-length encoded) encoding and decoding
•8/16-bit data interface
-BYTESWAP input provides easy interface to both Big- and Little-Endian systems
-Vectored interrupts simplify interrupt service routines
•System clock up to 25 MHz
•CMOS technology enables high speed and low power
• Available in a 100-pin MQFP package
• Supports IEEE STD 1284 specification
• Hardware support of IEEE STD 1284 timings
• 64-byte FIFO
• Parallel port signals provide level-2 drive characteristics
• DMA channel
• ECP compression/decompression in hardware


Pinout

Connection Diagram


Specifications

• Supply voltage (VCC) ..................+7.0 V (volts)
• Input voltages, with respect to ground .....−0.5 V to VCC +0.5 V
• Operating temperature (TA) ................0 to 70
• Storage temperature ................. −65 to 150
• Power dissipation .................. .0.25 W (watt)
Note: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any conditions above those indicated in the recommended operating conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.


Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
LED Products
LM24P20
KCG057QV1DB-G770
Batteries, Chargers, Holders
ICR18650-28A
ICR18650-26F/h
Crystals and Oscillators
WT325BI0030.000000
2SB49
Audio Products
HUC1002
WM-64CT
Prototyping Products
AVT4168
DE1
Semiconductor Modules
2DI300A-050-03
7MBR25SA-120-50
View more