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Part Number: CDCM7005-SP

 

 

 

 

Description: The CDCM7005-SP is a high-performance, low phase noise and low skew clock synchronizer that synchroniz...


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CDCM7005-SP General Description


The CDCM7005-SP is a high-performance, low phase noise and low skew clock synchronizer that synchronizes a VCXO (voltage controlled crystal oscillator) or VCO (voltage controlled oscillator) frequency to one of the two reference clocks.

Features of the CDCM7005-SP are:(1)High Performance LVPECL and LVCMOS PLL Clock Synchronizer; (2)Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support With Manual or Automatic Selection; (3)Accepts LVCMOS Input Frequencies Up to 200 MHz; (4)VCXO_IN Clock is Synchronized to One of the Two Reference Clocks; (5)VCXO_IN Frequencies Up to 2 GHz (LVPECL); (6)Outputs Can Be a Combination of LVPECL and LVCMOS (Up to Five Differential LVPECL Outputs or Up to 10 LVCMOS Outputs); (7)Output Frequency is Selectable by x1, /2, /3, /4,/6, /8, /16 on Each Output Individually; (8)Efficient Jitter Cleaning From Low PLL Loop Bandwidth.

The absolute maximum ratings of the CDCM7005-SP can be summarized as:(1)Supply voltage range (2) 0.5 V to 4.6 V; (2)Input voltage range (3) 0.5 V to VCC + 0.5 V; (3)Output voltage range (3) 0.5 V to VCC + 0.5 V; (4)Output current for LVPECL/LVCMOS outputs ±50 mA (0 < VO < VCC); (5)Input current (VI < 0, VI > VCC) ±20 mA; (6)Storage temperature range 65°C to 150°C; (7)Maximum junction temperature 125°C.

If you want to know more information such as the electrical characteristics ,please download the datasheet in www.seekdatasheet.com .

CDCM7005-SP Connection Diagram

CDCM7005-SP  Connection Diagram

CDCM7005-SP datasheet

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