CL-CD1400

The CL-CD1400 is a flexible asynchronous receiver/transmitterwith fourfull-duplexserial channels, or three full-duplex serial channels and one high-speed bidirectional parallel channel.With optional special character processing capabilities, it is especially well-suited for UNIX applications.The CL-CD1400 is fabricated in an advanced-CMOS process and operates on a system clock of up to 60 MHz. Packaged in a 100-pin PQFP, its hign throughput, low-power consumption and high level of integration permit system designs with minimum part-count, maximum performance and maximum reliability.

Features of the CL-CD1400 are:(1)software-proctrammableserial data rates ua to 230.4 KbpS, full-duplex; (2)twelve bytes of FIFO for each transmitter and each receiver, with programmable threshold for receive-FIFO interrupt generation; (3)improved interrupt schemes: good data interrupts eliminate the need for character status check; (4)independent bit rate selection for transmit and receive on each channel;(5)special character recognition and generation.

The absolute maximum ratings of the CL-CD1400 can be summarized as:(1)supply voltage:+7.0V;(2)storage temperature:-65 to 150;(3)operating temperature:0 to 70;(4)input voltage,with respect to ground:-0.5 to Vcc+0.5V;(5)power dissipation:0.25W.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any conditions above those indicated in the recommended operating conditions is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.The CL-CD1400can be described as a small computer system tailored to the function of sending and receiving serial and parallel data. It is made up of a RISC processor(MPU), RAM, ROM, host bus interface logic and serial data channels (one of which can function as a parallel port). It contains special instructions and hardware to facilitate serial data manipulation.In most cases, when the host reads or writes an internal CL-CD14001ocation, it actually accesses a location in a RAM array that serves as a bank of registers. Some locations, however, are mapped to actual hardware resources; for example, when a hard output signal is required, such as a service request output (in the SVRR), or when it is necessary to read the actual state of an, input, such as a modem input.