COP8SGR7

The COP8SG Family ROM and OTP based microcontrollers are highly integrated COP8™ Feature core devices with 8k to 32k memory and advanced features including Analog comparators, and zero external components. These single-chip CMOS devices are suited for more complex applications requiring a full featured controller with larger memory, low EMI, two comparators, and a full-duplex USART. COP8SGx7 devices are 100% form-fit-function compatible OTP (One Time Programmable) versions for use in production or development of the COP8SGx5 ROM.

Erasable windowed versions (Q3) are available for use with a range of COP8 software and hardware development tools.

Family features include an 8-bit memory mapped architecture, 15 MHz CKI with 0.67 µs instruction cycle, 14 interrupts, three multi-function 16-bit timer/counters with PWM, full duplex USART, MICROWIRE/PLUS™, two analog comparators, two power saving HALT/IDLE modes, MIWU, idle timer, on-chip R/C oscillator, high current outputs, user selectable options (WATCHDOG™, 4 clock/oscillator modes, power-on-reset), 2.7V to 5.5V operation, program code security, and 28/40/44 pin packages.

Devices included in this datasheet are:

Device	Memory (bytes)	RAM (bytes)	I/O Pins	Packages	Temperature
COP8SGE5	8k ROM	256	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGG5	16k ROM	512	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGH5	20k ROM	512	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGK5	24k ROM	512	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGR5	32k ROM	512	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGE7	8k OTP EPROM	256	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGR7	32k OTP EPROM	512	24/36/40	28 DIP/SOIC, 40 DIP, 44 PLCC/QFP/CSP	-40 to +85°C,-40 to +125°C
COP8SGR7-Q3	32k EPROM	512	24/36/40	28 DIP, 40 DIP, 44 PLCC	Room Temp.

Reliability Metrics

---

Part Number	Process	EFR Reject	EFR Sample Size	PPM	LTA Rejects	LTA Device Hours	FITS	MTTF (Hours)
COP8SGR728M7	TS060D	0	8860	0	0	612500	6	173798547
COP8SGR728M8	TS060D	0	8860	0	0	612500	6	173798547
COP8SGR728N8	TS060D	0	8860	0	0	612500	6	173798547
COP8SGR744V8	TS060D	0	8860	0	0	612500	6	173798547

Note: The Early Failure Rates (EFR) were calculated as point estimate PPM based on rejects and sample size for EFR. The Long Term Failure Rates were calculated at 60% confidence using the Arrhenius equation at 0.7eV activation energy and derating the assumed stress temperature of 150°C to an application temperature of 55°C.

For more information on Reliability Metrics, please click here.

Design Tools

---

Title	Size in Kbytes	Date
Tools for Evaluation, Design, and Programming"	38 Kbytes	3-Mar-2003	View Online	Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.

More Application Notes

---

Title	Size in Kbytes	Date
AN-1099: Application Note 1099 Creating a Multitasking Kernel for the COP8 Microcontroller	168 Kbytes	4-Oct-04	Download
AN-1150: Application Note 1150 COP8 FLASH ISP HANDBOOK[mdash]Intro to ISP	613 Kbytes	14-May-04	Download
AN-1155: Application Note 1155 A Simple Software I2C Routine for the COP8	82 Kbytes	15-May-04	Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.