CXK77920TM-12

Features: • Fast cycle time: (Cycle) (Frequency) CXK77920TM/YM-11 11.0ns 90MHz CXK77920TM/YM-12 12.5ns 80MHz CXK77920TM/YM-15 15.0ns 66.7MHz• Fast clock to data valid CXK77920TM/YM-11 6.0ns CXK77920TM/YM-12 6.5ns CXK77920TM/YM-15 7.0ns• High speed, low power consumption• Si...

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CXK77920TM-12 Picture
SeekIC No. : 004318716 Detail

CXK77920TM-12: Features: • Fast cycle time: (Cycle) (Frequency) CXK77920TM/YM-11 11.0ns 90MHz CXK77920TM/YM-12 12.5ns 80MHz CXK77920TM/YM-15 15.0ns 66.7MHz• Fast clock to data valid CXK77920TM/YM-11 6....

floor Price/Ceiling Price

Part Number:
CXK77920TM-12
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/27

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Product Details

Description



Features:

• Fast cycle time:            (Cycle)         (Frequency)
    CXK77920TM/YM-11   11.0ns              90MHz
    CXK77920TM/YM-12   12.5ns              80MHz
    CXK77920TM/YM-15   15.0ns              66.7MHz
• Fast clock to data valid
    CXK77920TM/YM-11    6.0ns
    CXK77920TM/YM-12    6.5ns
    CXK77920TM/YM-15    7.0ns
• High speed, low power consumption
• Single +5V power supply: 5V±5%
• Separate output power supply: 3.15 to 5.25V
• Inputs and outputs are TTL compatible (3.3V l/O compatible)
• Common data input and output
• All inputs and outputs are registered on a single clock edge
• Self-timed write cycle
• Package line-up: 400mil, 44 pin TSOP II with 0.8mm pitch



Pinout

  Connection Diagram


Specifications

Item
Symbol
Rating
Unit
Supply voltage
VCC
0.5 to +7.0
V
Input voltage
VIN
0.5 to VCC +0.5
V
Output voltage
VO
0.5 to VCC +0.5
V
Allowable power dissipation
PD
1
W
Operating temperature
Topr
0 to 70
Storage temperature
Tstg
55 to +150
Soldering temperature • time
Tsolder
235 • 10
• sec



Description

The CXK77920TM-12 is a high speed CMOS synchronous static RAM with common l/O pins, organized as 262144-word-by-9-bit. This synchronous SRAM integrates input registers, high speed SRAM and output registers onto a single monolithic IC. All input signals are latched at the positive edge of an external clock (CLK). The RAM data from the previous cycle is presented at the positive edge of the subsequent clock cycle. Write operation is initiated by the positive edge of CLK and is internally self-timed. This CXK77920TM-12 feature eliminates complex off-chip write pulse generation and provides increased flexibility for incoming signals. 90MHz operation is obtained from a single 5V power supply.




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