Purchase CXP402, In-stock CXP402 From SeekIC.
Part Number: CXP402
Description: The CXP402 is a CMOS 4-bit single chip microcomputer which consists of 4-bit CPU, ROM, RAM, 8-bit timer, 8-bit timer/co...
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CXP402
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DataSheet
General Description
CXP402 General Description
The CXP402 is a CMOS 4-bit single chip microcomputer which consists of 4-bit CPU, ROM, RAM, 8-bit timer, 8-bit timer/counter, 18-bit time-base timer,LCD controller/driver, digital signal processor circuit for CD player, 1-bit DAC and the like.
CXP402 Maximum Ratings
| Item | Symbol | Rating | Unit | Remarks |
| Supply voltage | VDD | 0.3 to +7.0*1 | V | |
| LCD bias voltage | VLC1, VLC2, VLC3 | 0.3 to +7.0*2 | V | |
| Input voltage | VIN | 0.3 to +7.0*2 | V | |
| Output voltage | VOUT | 0.3 to +7.0*2 | V | |
| High level output current | IOH | 5 | mA | Output pin (value per pin) |
| High level total output current | IOH | 70 | mA | Total of all output pins |
| Low level output current | IOL | 15 | mA | Output pin (value per pin) |
| Low level total output current | IOL | 100 | mA | Total of output pins |
| Operating temperature | Topr | 20 to +75 | °C | |
| Storage temperature | Tstg | 40 to +125 | °C | |
| Allowable power dissipation | PD | 600 | mW |
CXP402 Features
• Instruction cycle 1.89µs for 16.93MHz oscillation
• ROM capacity 6144 *8 bits
• RAM capacity 400 *4 bits (Including stack and display area)
• LCD controller/driver (Enables to direct drive)
• 8-bit timer, 8-bit timer/event counter and 18-bit time-base timer are incorporated; they are independently controllable.
• Arithmetic and logical operations between the entire RAM area, I/O area and the accumulator by means of the memory mapped I/O.
• Entire ROM area can be referred by the table lookup instruction. Digital Signal Processor (DSP) Block
• Playback mode supporting CAV (Constant Angular Velocity)
• Frame jitter free
• Allows relative rotational velocity readout
• Supports spindle external control
• Wide capture range playback mode
• Spindle rotational velocity following method
• 16K RAM
• EFM data demodulation
• Enhanced EFM frame sync signal protection
• SEC strategy-based error correction
• Subcode demodulation and Sub Q data error detection
• Digital spindle servo
• 16-bit traverse counter
• Asymmetry correction circuit
• Servo auto sequencer
• Digital audio interface output
• Digital peak meter Digital Filter, DAC and Analog Low-Pass Filter Blocks
• DBB (digital bass boost) function
• Digital de-emphasis
• Digital attenuation
• Zero detection function
• 8Fs oversampling digital filter
• S/N: 100dB or more (master clock: 384Fs, typ.) Logical value: 109dB
• THD + N: 0.007% or less (master clock: 384Fs, typ.)
• Rejection band attenuation: 60dB or more
• 112-pin plastic LQFP
• Piggyback package (CXP401Z) available
• ROM capacity 6144 *8 bits
• RAM capacity 400 *4 bits (Including stack and display area)
• LCD controller/driver (Enables to direct drive)
• 8-bit timer, 8-bit timer/event counter and 18-bit time-base timer are incorporated; they are independently controllable.
• Arithmetic and logical operations between the entire RAM area, I/O area and the accumulator by means of the memory mapped I/O.
• Entire ROM area can be referred by the table lookup instruction. Digital Signal Processor (DSP) Block
• Playback mode supporting CAV (Constant Angular Velocity)
• Frame jitter free
• Allows relative rotational velocity readout
• Supports spindle external control
• Wide capture range playback mode
• Spindle rotational velocity following method
• 16K RAM
• EFM data demodulation
• Enhanced EFM frame sync signal protection
• SEC strategy-based error correction
• Subcode demodulation and Sub Q data error detection
• Digital spindle servo
• 16-bit traverse counter
• Asymmetry correction circuit
• Servo auto sequencer
• Digital audio interface output
• Digital peak meter Digital Filter, DAC and Analog Low-Pass Filter Blocks
• DBB (digital bass boost) function
• Digital de-emphasis
• Digital attenuation
• Zero detection function
• 8Fs oversampling digital filter
• S/N: 100dB or more (master clock: 384Fs, typ.) Logical value: 109dB
• THD + N: 0.007% or less (master clock: 384Fs, typ.)
• Rejection band attenuation: 60dB or more
• 112-pin plastic LQFP
• Piggyback package (CXP401Z) available
CXP402 Connection Diagram
CXP402
PDF/DataSheet Download
- Datasheet: CXP402
- File Size: 271986 KB
- Manufacturer: SONY [Sony Corporation]
- Click here to Download
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CXP402 Relative Products
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