CY5474FCT841T General Description
The FCT841T bus interface latch is designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The FCT841T is a buffered 10-bit wide version of the FCT373 function.
The FCT841T high-performance interface is designed for high-capacitance load drive capability while providing low-capacitance bus loading at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high impedance state and are designed with a power-off disable feature to allow for live insertion of boards.
CY5474FCT841T Maximum Ratings
Storage Temperature ...............................65°C to +150°C
Ambient Temperature with
Power Applied ..........................................65°C to +135°C
Supply Voltage to Ground Potential ............... 0.5V to +7.0V
DC Input Voltage............................................ 0.5V to +7.0V
DC Output Voltage ......................................... 0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) .......... 120 mA
Power Dissipation .............................................................0.5W
Static Discharge Voltage................................................>2001V
CY5474FCT841T Features
• Function, pinout, and drive compatible with FCT, F, and AM29841 logic
• FCT-C speed at 5.5 ns max. (Com'l)FCT-B speed at 6.5 ns max. (Com'l)
• Reduced VOH (typically = 3.3V) versions of equivalent FCT functions
• Edge-rate control circuitry for significantly improved noise characteristics
• Power-off disable feature
• Matched rise and fall times
• ESD > 2000V
• Fully compatible with TTL input and output logic levels
• Sink current 64 mA (Com'l),32 mA (Mil) Source current 32 mA (Com'l),12 mA (Mil)
• High-speed parallel latches
• Buffered common latch enable input
CY5474FCT841T Connection Diagram
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