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CY74FCT399T

Features: Function, Pinout, and Drive Compatible With FCT and F LogicReduced VOH (Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoff Supports Partial-Power-Down Mode OperationMatched Rise and Fall TimesESD Protect...

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SeekIC No. : 004319542 Detail

CY74FCT399T: Features: Function, Pinout, and Drive Compatible With FCT and F LogicReduced VOH (Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise ...

CY74FCT399T Data Sheet

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Part Number:
CY74FCT399T
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

Function, Pinout, and Drive Compatible With FCT and F Logic
Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
Ioff Supports Partial-Power-Down Mode Operation
Matched Rise and Fall Times
ESD Protection Exceeds JESD 22
  2000-V Human-Body Model (A114-A)
  200-V Machine Model (A115-A)
  1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and Output Logic Levels
64-mA Output Sink Current  32-mA Output Source Current


Pinout

Connection Diagram


Specifications

Supply voltage range to ground potential   . . . . . . . . . . . . . . . 0.5 V to 7 V 
DC input voltage range   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
DC output voltage range   . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 7 V
DC output current (maximum sink current/pin)   . . . . . . . . . . . . . . . . .120 mA
Package thermal impedance, JA (see Note 1)  . . . . . . . . . . . . . . . . .57°C/W
Ambient temperature range with power applied, TA  . . . . .65°C to 135°C
Storage temperature range, Tstg   . . . . . . . . . . . . . . . . . . .65°C to 150°C


Description

The CY74FCT399T is a high-speed quad 2-input register that selects four bits of data from either of two sources (ports) under control of a common select (S) input. Selected data are transferred to a 4-bit output register synchronous with the low-to-high transition of the clock (CP) input. The 4-bit D-type output register is fully edge triggered. The data inputs (I0X, I1X) and S input must be stable only one setup time prior to, and hold time after, the low-to-high transition of CP for predictable operation. The CY74FCT399T has noninverted outputs.

CY74FCT399T is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.




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