CYM1841A

Features: • High-density 8-megabit SRAM module• 32-bit standard footprint supports densities from 16K x 32 through 1M x 32• High-speed CMOS SRAMs-Access time of 12 ns• Low active power-5.3W (max.) at 25 ns• SMD technology• TTL-compatible inputs and outputs•...

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CYM1841A Picture
SeekIC No. : 004320643 Detail

CYM1841A: Features: • High-density 8-megabit SRAM module• 32-bit standard footprint supports densities from 16K x 32 through 1M x 32• High-speed CMOS SRAMs-Access time of 12 ns• Low ac...

floor Price/Ceiling Price

Part Number:
CYM1841A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/28

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Product Details

Description



Features:

• High-density 8-megabit SRAM module
• 32-bit standard footprint supports densities from 16K x 32 through 1M x 32
• High-speed CMOS SRAMs
-Access time of 12 ns
• Low active power
-5.3W (max.) at 25 ns
• SMD technology
• TTL-compatible inputs and outputs
• Low profile
-Max. height of 0.58 in.
• Available in ZIP, SIMM, and angled SIMM footprint
• 72-pin SIMM version compatible with 1M x 32 (CYM1851)



Pinout

  Connection Diagram


Specifications

Storage Temperature ..................................... 55°C to +125°C
Ambient Temperature with
Power Applied .................................................... 10°C to +85°C
Supply Voltage to Ground Potential..................     0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ..................................................... 0.5V to +7.0V
DC Input Voltage ................................................. 0.5V to +7.0V



Description

The CYM1841A/1841C are high-performance 8-megabit static RAM modules organized as 256K words by 32 bits.The CYM1841A/1841C is constructed from eight 256K x 4 SRAMs in SOJ packages mounted on an epoxy laminate board with pins. Four chip selects (CS1, CS2, CS3, CS4) are used to independently enable the four bytes. Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects.

Writing to each byte is accomplished when the appropriate chip select (CS) and write enable (WE) inputs of the CYM1841A/1841C are both LOW. Data on the input/output pins (I/O) is written into the memory location specified on the address pins (A0 through A17). Reading the device is accomplished by taking the chip select (CS) LOW while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data input/output pins (I/O). The data input/output pins stay at the high-impedance state when write enable is LOW or the appropriate chip selects are HIGH.

Two pins (PD0 and PD1)of the CYM1841A/1841C  are used to identify module memory density in applications where alternate versions of the JEDEC-standard modules can be interchanged.

The CYM1841A and CYM1841C are 100% pin, package, and electrically identical. The CYM1841A utilizes corner power and ground SRAMs, the CYM1841C utilizes center power and ground SRAMs.

A 72-pin SIMM is offered for compatibility with the 1M x 32 CYM1851. This version is socket upgradable to the CYM1851. Both the 64-pin and 72-pin SIMM modules are available with either tin-lead or 10 micro-inches of gold flash on the edge contacts.




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