DM54L74

  This DM54L74 device contains two independent positive-edge-trig-gered D flip-flops with complementary outputs. The informa-tion on the D input is accepted by the flip-flops on the posi-tive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is low or high without af-fecting the outputs as long as the data setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs of DM54L74 regardless of the logic levels of the other inputs.