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Part Number: DM562P
Description: The DM562P integrated modem is a two-chipsetdesign that provides a complete solution for state-o...
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DM562P
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DataSheet
General Description
DM562P General Description
The DM562P integrated modem is a two-chipset design that provides a complete solution for state-of-the-art, voice-band Plain Old Telephone Switching (POTS) communication. The modem provides for Data (up to 56,000bps),Fax (up to 14,400bps), Voice and Full Duplex Speaker-phone functions to comply with various international standards.
The design of the DM562P is optimized for desktop personal computer applications and it provides a low cost, highly reliable, maximum integration, with the minimum amount of support required. The DM562P modem can operate over a dial-up network (PSTN)or 2 wire leased lines.
The modem integrates auto dial and answer capabilities, asynchronous data transmissions,serial and parallel interfaces, various tone detection schemes and data test modes.
The DM562P modem reference design is pre-approved for FCC part 68 and provides minimum design cycle time, with minimum cost to insure the maximum amount of success.
The simplified modem system, shown in figure below, illustrates the basic interconnection between the MCU, DSP, AFE and other basic components of a modem. The individual elements of the DM562P are:
* DM6580 Analog Front End (AFE). 28-pin PLCC package
* DM6588 ITU-T V.90 integrated Processors with 32K bytes SRAM built in 128-pin QFP package
DM562P Maximum Ratings
| Symbol | Parameter | Min. | Max. | Unit | Conditions |
| DVCC,AVCC | Supply Voltage | -0.3 | 3.6 | V | |
| VIN | DC Input Voltage (VIN) | -0.5 | 5.5 | V | |
| VOUT | DC Output Voltage(VOUT) | -0.3 | 3.6 | V | |
| Tc | Case Temperature Range | 0 | 85 | ||
| Tstg | Storage Temperature Rang (Tstg) | -65 | 150 | ||
| LT | Lead Temp. (TL, Soldering, 10 sec.) | --- | 220 |
DM562P Features
*Compatibility
- ITU-T V.90 (56000 to 28000 bps)
- ITU-T V.34 (33600 to 2400 bps)
- CCITT V.32bis (14400, 12000, 9600, 7200.4800bps)
- CCITT V.32 (9600, 4800bps)
- CCITT V.22bis (2400, 1200bps)
- CCITT V.22 (1200bps)
- CCITT V.23 (1200/75bps)
- CCITT V.21 (300bps)
- Bell 212A (1200bps)
- Bell 103 (300bps)
*Fax
- CCITT V.17 (14400, 12000,9600,7200bps)
- CCITT V.29 (9600, 7200bps)
- CCITT V.27ter (4800, 2400bps)
- CCITT V.21 Channel 2 (300bps)
- Group III, Class 1
*Data Error Correction
- MNP Class 4
- CCITT V.42 LAPM
*Data Compression
- MNP Class5
- CCITT V.42bis
*Voice compression
- 2,3 and 4 bit ADPCM
- IMA ADPCM (Developing)
- 8 Bit PCM
*DTE Interface
- DTE speed up to 115200bps
*Enhanced "AT" command set and S registers
- TIA/EIA 602, ITU V.25 ter AT command Set
- TIA/EIA 578 Fax Class 1 command set
-
- TIA/EIA IS-101 Voice command set
*Integrated UART 16550
*Serial interfaces
- 6, 7 and 8 bit character support
- Even, odd, mark and none parity detection and generation
- 1 and 2 stop bit support
- Auto DTE data speed detection through"AT"
*Parallel interfaces (PCI)
- PCI Plug and Play (PnP) support
- Compliant with PCI specification 2.1
- Compliant with the Advanced Configuration and
- ower Interface Specification(ACPI) revision 1.0
- Compliant with PCI bus Power Management Interface Specification revision 1.0
*Caller identification (Caller ID) support
*Speakerphone
*Selectable world wide call progress tone detection
*Enhanced 8032 compatible micro-controller
*Power down mode
*Access up to 256K bytes external program memory
*Access up to 64K bytes external data memory
*NVRAM to store two user configurable,selectable profiles with three programmable telephone numbers
*32K bytes SRAM built in
- ITU-T V.90 (56000 to 28000 bps)
- ITU-T V.34 (33600 to 2400 bps)
- CCITT V.32bis (14400, 12000, 9600, 7200.4800bps)
- CCITT V.32 (9600, 4800bps)
- CCITT V.22bis (2400, 1200bps)
- CCITT V.22 (1200bps)
- CCITT V.23 (1200/75bps)
- CCITT V.21 (300bps)
- Bell 212A (1200bps)
- Bell 103 (300bps)
*Fax
- CCITT V.17 (14400, 12000,9600,7200bps)
- CCITT V.29 (9600, 7200bps)
- CCITT V.27ter (4800, 2400bps)
- CCITT V.21 Channel 2 (300bps)
- Group III, Class 1
*Data Error Correction
- MNP Class 4
- CCITT V.42 LAPM
*Data Compression
- MNP Class5
- CCITT V.42bis
*Voice compression
- 2,3 and 4 bit ADPCM
- IMA ADPCM (Developing)
- 8 Bit PCM
*DTE Interface
- DTE speed up to 115200bps
*Enhanced "AT" command set and S registers
- TIA/EIA 602, ITU V.25 ter AT command Set
- TIA/EIA 578 Fax Class 1 command set
-
- TIA/EIA IS-101 Voice command set
*Integrated UART 16550
*Serial interfaces
- 6, 7 and 8 bit character support
- Even, odd, mark and none parity detection and generation
- 1 and 2 stop bit support
- Auto DTE data speed detection through"AT"
*Parallel interfaces (PCI)
- PCI Plug and Play (PnP) support
- Compliant with PCI specification 2.1
- Compliant with the Advanced Configuration and
- ower Interface Specification(ACPI) revision 1.0
- Compliant with PCI bus Power Management Interface Specification revision 1.0
*Caller identification (Caller ID) support
*Speakerphone
*Selectable world wide call progress tone detection
*Enhanced 8032 compatible micro-controller
*Power down mode
*Access up to 256K bytes external program memory
*Access up to 64K bytes external data memory
*NVRAM to store two user configurable,selectable profiles with three programmable telephone numbers
*32K bytes SRAM built in
DM562P Connection Diagram
DM5400
PDF/DataSheet Download
- Datasheet: DM5400
- File Size: 96352 KB
- Manufacturer: NSC [National Semiconductor]
- Click here to Download
- ·DM5400J
- NSC [National Semiconductor]
- Quad 2-Input NAND Gates
- 96352 KB
- ·DM5400W
- NSC [National Semiconductor]
- Quad 2-Input NAND Gates
- 96352 KB
- ·DM5401
- NSC [National Semiconductor]
- Quad 2-Input NAND Gates with Open-Collector Outputs
- 100272 KB
- ·DM5402
- NSC [National Semiconductor]
- Quad 2-Input NOR Gates
- 95269 KB
- ·DM5402J
- NSC [National Semiconductor]
- Quad 2-Input NOR Gates
- 95269 KB
- ·DM5402W
- NSC [National Semiconductor]
- Quad 2-Input NOR Gates
- 95269 KB
- ·DM5403
- NSC [National Semiconductor]
- Quad 2-Input NAND Gates with Open-Collector Outputs
- 96027 KB
- ·DM5403J
- NSC [National Semiconductor]
- Quad 2-Input NAND Gates with Open-Collector Outputs
- 96027 KB
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