DM74AS286M

Number of Circuits : 1
Number of Bits : 9
Maximum Operating Temperature : + 70 C
Minimum Operating Temperature : 0 C
Packaging : Tube
Package / Case : SOIC-14
Operating Supply Voltage : 4.5 V to 5.5 V
Logic Family : 74AS
High Level Output Current : - 15 mA
Low Level Output Current : 48 mA
Propagation Delay Time : 15 ns


Features:

· PNP inputs to reduce bus loading
· Generates either odd or even parity for nine data lines
· Inputs are buffered to lower the drive requirements
· Can be used to upgrade existing systems using MSI
  parity circuits
· Cascadable for n-bits
· Switching specifications at 50 pF
· Switching specifications guaranteed over full
  temperature and VCC range
· A parity I/O portable to drive b


Pinout




Specifications

Supply Voltage .........................................................7V
Input Voltage ...........................................................7V
Operating Free Air Temperature Range... 0°C to +70°C
Storage Temperature Range .............−65°C to +150°C
Typical JA
N Package .....................................................77.0°C/W
M Package ...................................................108.0°C/W
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operatio


Description

These DM74AS286M universal, 9-bit parity generators/checkers utilize advanced Schottky high performance circuitry and feature odd/even outputs to facilitate operation of either odd or even parity applications. The word length capability is easily expanded by cascading.

The DM74AS286M can be used to upgrade the performance of most systems utilizing the DM74AS280 parity generator/ checker. Although the DM74AS286 is implemented without expander inputs, the corresponding function is provided by the availability of an input pin XMIT. XMIT is a control line which makes parity error output active and parity an input port when HIGH; when LOW, parity error output is inactive and parity becomes an output port. In addition, parity I/O control circuitry contains a feature to keep the I/O port in the 3-STATE during power UP or DOWN to prevent bus glitches.