DS21354 General Description
DS21354 Maximum Ratings
Voltage Range on Any Pin Relative to Ground................................-1.0V to +6.0V
Operating Temperature Range for DS21354L/DS21554L...................0 to +70
Operating Temperature Range for DS21354LN/DS21554LN..........-40 to +85
Storage Temperature Range.......................................................-55 to +125
Soldering Temperature..........................See IPC/JEDEC J-STD-020A Specification
DS21354 Features
Complete E1 (CEPT) PCM-30/ISDN-PRI Transceiver Functionality
On-Board Long- and Short-Haul Line Interface for Clock/Data Recovery and Waveshaping
32-Bit or 128-Bit Crystal-Less Jitter Attenuator
Frames to FAS, CAS, CCS, and CRC4 Formats
Integral HDLC Controller with 64-Byte Buffers Configurable for Sa Bits, DS0, or Sub-DS0 Operation
Dual Two-Frame Elastic Store Slip Buffers that can Connect to Asynchronous Backplanes up to 8.192MHz
Interleaving PCM Bus Operation
8-Bit Parallel Control Port that can be used Directly on Either Multiplexed or Nonmultiplexed Buses (Intel or Motorola)
Extracts and Inserts CAS Signaling
Detects and Generates Remote and AIS Alarms
Programmable Output Clocks for Fractional E1, H0, and H12 Applications
Fully Independent Transmit and Receive Functionality
Full Access to Si and Sa Bits Aligned with CRC-4 Multiframe
Four Separate Loopback Functions for Testing Functions
Large Counters for Bipolar and Code Violations, CRC4 Codeword Errors, FAS Word Errors, and E Bits
IEEE 1149.1 JTAG-Boundary Scan Architecture
Pin Compatible with DS2154/52/352/552 SCTs
3.3V (DS21354) or 5V (DS21554) Supply; Low-Power CMOS
100-pin LQFP package (14mm x 14mm)
DS21354 Connection Diagram
Map list: ABCDEFGHIJKLMNOPQRSTUVWXYZ 0123456789All