DS2450

The DS2450 1-Wire Quad A/D Converter is based on a successive-approximation analog to digital converter with a four to one analog multiplexer. Each input channel of DS2450 has its own register set to store the input voltage range, resolution, and alarm threshold values as well as flags to enable participation of the device in the conditional search if the input voltage leaves the specified range. Two alarm flags for each channel indicate if the voltage measured was too high or too low without requiring the bus master to do the comparison. Each A/D conversion DS2450 is initiated by the bus master. A channel not used as analog input can serve as a digital open-drain output. After disabling the input the bus master can directly switch on or off the open-drain transistor at the selected channel. All device DS2450 settings are stored in SRAM and kept non-volatile while the device gets power either through the 1-Wire bus or through its VCC pin. After powering up a power-on reset flag signals the bus master the need to restore the device settings before the regular operation can resume. All device DS2450 registers and conversion read-out registers are organized as three 8-byte memory pages similar to the Status Memory of a DS2505/6 device. An on-chip CRC16 generator protects the communication against transmission errors when reading through the end of a memory page as well as when writing individual bytes.