DS3065WP

The DS3065WP consists of a static RAM, a nonvolatile(NV) controller, and a real-time clock (RTC). These components are packaged on a surface-mount substrate and require post-assembly attachment of a DS9034IPCX+ battery cap. Whenever VCC is applied to the module, it powers the clock and SRAM from the external power source, and allows the contents of the clock registers or SRAM to be modified. When VCC is powered down or out of tolerance, the controller write protects the memory contents and powers the clock and SRAM from the battery.

Features of the DS3065WP are:(1)reflowable, 34-pin powercap package; (2)integrated RTC; (3)unconditionally write protects the clock and SRAM When VCC is out of tolerance; (4)automatically switches to battery supply When VCC power failures occur; (5)extended industrial temperature range (-40 to +85); (6)underwriters laboratories recognized.The RTC registers are double-buffered into an internal and external set. The user has direct access to the external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow the user to access static data. Assuming the internal oscillator is on, the internal registers are continually updated, regardless of the state of the external registers, assuring that accurate RTC information is always maintained.

The absolute maximum ratings of the DS3065WP can be summarized as:(1)voltage range on any pin relative to ground:-0.3V to +4.6V;(2)storage temperature range:-55 to +125;(3)lead temperature:260;(4)soldering temperature:260.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.The device provides full functional capability for VCC greater than 3.0V and write protects by 2.8V. Data is maintained in the absence of VCC without additional support circuitry. The NV SRAM constantly monitors VCC.Should the supply voltage decay, the NV SRAM automatically write protects itself. All inputs become don't care, and all data outputs become high impedance.