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DS32EL0421

PinoutSpecificationsFunctionSerializerTotal Throughput3125 MbpsPayload/Channel3125 MbpsSignal ConditioningDe-EmphasisClock Min125 MHzClock Max312.5 MHzInput CompatibilityLVDSOutput CompatibilityCMLReference Clock Req'd DeserializerNoPower Consumption_500 mWReach20 meters CAT6Other Supply2.5SupplyV...

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SeekIC No. : 004328995 Detail

DS32EL0421: PinoutSpecificationsFunctionSerializerTotal Throughput3125 MbpsPayload/Channel3125 MbpsSignal ConditioningDe-EmphasisClock Min125 MHzClock Max312.5 MHzInput CompatibilityLVDSOutput CompatibilityCMLR...

DS32EL0421 Data Sheet

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Part Number:
DS32EL0421
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/23

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Product Details

Description



Pinout




Specifications

FunctionSerializer
Total Throughput3125 Mbps
Payload/Channel3125 Mbps
Signal ConditioningDe-Emphasis
Clock Min125 MHz
Clock Max312.5 MHz
Input CompatibilityLVDS
Output CompatibilityCML
Reference Clock Req'd DeserializerNo
Power Consumption_500 mW
Reach20 meters CAT6
Other Supply2.5
SupplyVoltage3.3 Volt
ESD8 kV
Temperature Min-40 deg C
Temperature Max85 deg C
Compression Ratio5:1 DDR
Number Transmitters1
CommunicationsYes
Sensing & ImagingYes
Parallel Bus Width5 bits
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Description

The DS32EL0421/ DS32ELX0421 is a 125 MHz to 312.5 MHz (DDR) serializer for high-speed serial transmission over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly interface.

The DS32EL0421/DS32ELX0421 serializes up to 5 parallel input LVDS channels to create a maximum data payload of 3.125 Gbps. If the integrated DC-balance encoding is enabled, the maximum data payload achievable is 2.5 Gbps.

The DS32EL0421/DS32ELX0421 serializers feature remote sense capability to automatically detect and negotiate link status with its companion DS32EL0124/DS32ELX0124 deserializers without requiring an additional feedback path.

The parallel LVDS interface reduces FPGA I/O pins, board trace count and alleviates EMI issues, when compared to traditional single-ended wide bus interfaces.

The DS32EL0421/DS32ELX0421 is programmable through a SMBus interface as well as through control pins.

Design Tools

Title Size in Kbytes Date    
High-Performance SerDes Module with Easy FPGA Interface and Cable Detect     View    

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