DS32ELX0124

PinoutSpecificationsFunctionDeserializerTotal Throughput3125 MbpsPayload/Channel3125 MbpsSignal ConditioningEqualizerClock Min125 MHzClock Max312.5 MHzInput CompatibilityCMLOutput CompatibilityLVDSReference Clock Req'd DeserializerNoReach20 meters CAT6Other Supply2.5SupplyVoltage3.3 VoltSpecial Fe...

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DS32ELX0124 Picture
SeekIC No. : 004328996 Detail

DS32ELX0124: PinoutSpecificationsFunctionDeserializerTotal Throughput3125 MbpsPayload/Channel3125 MbpsSignal ConditioningEqualizerClock Min125 MHzClock Max312.5 MHzInput CompatibilityCMLOutput CompatibilityLVDSR...

floor Price/Ceiling Price

Part Number:
DS32ELX0124
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/1

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Product Details

Description



Pinout




Specifications

FunctionDeserializer
Total Throughput3125 Mbps
Payload/Channel3125 Mbps
Signal ConditioningEqualizer
Clock Min125 MHz
Clock Max312.5 MHz
Input CompatibilityCML
Output CompatibilityLVDS
Reference Clock Req'd DeserializerNo
Reach20 meters CAT6
Other Supply2.5
SupplyVoltage3.3 Volt
Special FeaturesRetimed Output
ESD8 kV
Temperature Min-40 deg C
Temperature Max85 deg C
Compression Ratio5:1 DDR
Number Receivers1
CommunicationsYes
Sensing & ImagingYes
Parallel Bus Width5 bits
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Description

The DS32EL0124/ DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly interface.

The DS32EL0124/DS32ELX0124 deserializes up to 3.125 Gbps of high speed serial data to 5 LVDS outputs without the need for an external reference clock. With DC-balance decoding enabled, the application payload of 2.5 Gbps is deserialized to 4 LVDS outputs.

The DS32EL0124/DS32ELX01214 deserializers feature a remote sense capability to automatically signal link status conditions to its companion DS32EL0421/ELX0421 serializers without requiring an additional feedback path.

The parallel LVDS interface of these devices reduce FPGA I/O pins, board trace count and alleviates EMI issues, when compared to traditional single-ended wide bus interfaces.

The DS32EL0124/ELX0124 is programmable through a SMBus interface as well as through control pins.

Design Tools


Title Size in Kbytes Date    
FPGA-Link SerDes Reference Design     View    

If you have trouble printing or viewing PDF file(s), see Printing Problems.

Application Notes


Title Size in Kbytes Date
AN-1887: Application Note 1887 Expanding the Payload with National's FPGA-Link DS32ELX0421 and DS32ELX0124 Serializer and Deserializer 122 Kbytes 12-Sep-08 Download

If you have trouble printing or viewing PDF file(s), see Printing Problems.




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