Features: 8 bit DS3896 transceiver provides high package density
4 bit DS3897 transceiver provides separate driver inputand receiver output pins
BTL compatible
Less than 5 pF output capacitance for minimal busloading
1 Volt bus signal swing reduces power consumption
Trapezoidal driver waveforms (tr,tf 6 ns typical)reduce noise coupling to adjacent lines
Temperature insensitive receiver thresholds track thebus logic high level to maximize noise immunity in bothhigh and low states
Guaranteed A.C. specifications on noise immunity andpropagation delay over the specified temperature andsupply voltage range
Open collector driver output allows wire-or connection
Advanced low power schottky technology
Glitch free power up/down protection on driver andreceiver outputs
TTL compatible driver and control inputs and receiveroutputsSpecificationsIf Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage ........................................................6V
Control Input Voltage ...........................................5.5V
Driver Input and Receiver Output......................... 5.5V
Receiver Input and Driver Output .........................2.5V
Power Dissipation at 70˚C N Package........... 1480 mW
M Package .......................................................TBD mW
Storage Temperature Range .............−65˚C to +150˚C
Lead Temperature (Soldering, 4 sec.) ................260˚CDescriptionThese advanced transceivers are specifically designed toovercome problems associated with driving a densely popu-lated backplane, and thus provide significant improvement inboth speed and data integrity. Their low output capacitance,low output signal swing and noise immunity features makethem ideal for driving low impedance buses with minimumpower consumption.The DS3896 is an octal high speed schottky bus transceiverwith common control signals, whereas the DS3897 is a quaddevice with independent driver input and receiver outputpins. The DS3897 has a separate driver disable for eachdriver and is, therefore, suitable for arbitration lines. Theseparate driver disable pins (En) feature internal pull upsand may be left open if not required. On the other hand, theDS3896 provides high package density for data/addresslines.
The DS3896 open collector drivers generate precise trapezoidalwaveforms, which are relatively independent of capacitiveloading conditions on the outputs. This significantly reducesnoise coupling to adjacent lines. In addition, the receiversuse a low pass filter in conjunction with a high speed com-parator, to further enhance the noise immunity and provideequal rejection to both negative and positive going noisepulses on the bus.To minimize bus loading, these devices also feature a schot-tky diode in series with the open collector output that isolates
the DS3896 driver output capacitance in the disabled state. The out-put low voltage is typically "1V" and the output high level isintended to be 2V. This is achieved by terminating the buswith a pull up resistor to 2V at both ends. The device candrive an equivalent DC load of 18.5Ω (or greater) in the above configuration.These signalling requirements, including a 1 volt signalswing, low output capacitance and precise receiver thresh-olds are referred to as Bus Transceiver Logic (BTL).
DS3896 Data Sheet
