Features: 4 separate driver/receiver pairs per packageGuaranteed minimum bus noise immunity of 0.6V, 1.1V typTemperature insensitive receiver thresholds track bus logic levels30 A typical bus terminal current with normal VCC or with VCC = 0VOpen collector driver output allows wire-OR connectionHig...
DS8641: Features: 4 separate driver/receiver pairs per packageGuaranteed minimum bus noise immunity of 0.6V, 1.1V typTemperature insensitive receiver thresholds track bus logic levels30 A typical bus termin...
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The DS8641 is a quad high speed drivers/receivers designed for use in bus organized data transmission systems interconnected by terminated 120W impedance lines. The external termination is intended to be a 180W resistor from the bus to the +5V logic supply together with a 390W resistor from the bus to ground. The bus can be terminated at one or both ends. Low bus pin current allows up to 27 driver/ receiver pairs to utilize a common bus. The bus loading is unchanged when VCC = 0V. The receivers incorporate tight thresholds for better bus noise immunity. One two-input NOR gate is included to disable all drivers in a package simultaneously.