DS90LV018ATM

Maximum Operating Temperature : + 85 C
Operating Supply Voltage : 3.3 V
Packaging : Tube
Number of Drivers : 1
Number of Receivers : 1
Data Rate : 400 Mbps
Maximum Power Dissipation : 1025 mW
Package / Case : SOIC-8 Narrow


Description

The DS90LV018ATM is one member of the DS90LV018A series.The DS90LV018Ais a single CMOS differential line receiver designed for applications requiring ultra low power dissipation,lownoiseandhighdatarates.The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing low voltage differential signaling (LVDS) technology.The DS90LV018ATM accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver also supports open, shorted and terminated (100) input fail-safe.The receiver output will be HIGH for all fail-safe conditions.The DS90LV018A has a flow-through design for easy PCB layout.

Features of the DS90LV018ATM are:(1)>400 Mbps (200 MHz) switching rates; (2)50 ps differential skew (typical); (3)2.5 ns maximum propagation delay; (4)3.3V power supply design; (5)flow-through pinout; (6)power down high impedance on LVDS inputs; (7)low power design (18mW @ 3.3V static); (8)interoperable with existing 5V LVDS networks; (9)accepts small swing (350 mV typical) differential signal levels; (10)supports open, short and terminated input fail-safe; (11)conforms to ANSI/TIA/EIA-644 Standard; (12)industrial temperature operating range(-40 to +85); (13)available in SOIC package.The DS90LV018A and companion LVDS line driver provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The absolute maximum ratings of the DS90LV018ATM can be summarized as:(1)supply voltage:-0.3 to +4 V;(2)storage temperature range:-65 to 150;(3)maximum package power dissipation:1025mW;(4)lead temperature range soldering:260;(5)maximum junction temperature +150;(6)input voltage:-0.3 to 3.9V;(7)output voltage:-0.3 to Vcc+0.3V.LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as is shown in Figure 3.This configuration provides a clean signaling environment for the fast edge rates of the drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted paircable,a parallel pair cable,or simply PCB traces.Typically the characteristic impedance of the media is in the range of 100. A termination resistor of 100 should be selected to match the media, and is located as close to the receiver input pins as possible. The termination resistor converts the driver output (current mode) into a voltage that is detected by the receiver.