EM488M1644LBA

Features:

• Fully Synchronous to Positive Clock Edge
• VDD/VDDQ= 1.8V +/- 0.1V Power Supply
• LVTTL Compatible with Multiplexed Address
• Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page
• Programmable CAS Latency (C/L) 1,2,3
• Data Mask (DQM) for Read / Write Masking
• Programmable Wrap Sequence
  Sequential (B/L = 1/2/4/8/full Page)
  Interleave (B/L = 1/2/4/8)
• Burst Read with Single-bit Write Operation
• All Inputs are Sampled at the Rising Edge of the System Clock
• Auto Refresh and Self Refresh
• Auto Temperature Compensated Self Refresh
• Partial Array Self Refresh
• Power Down Mode
• Deep Power Down Mode
• Programmable output buffer driver strength
• 4,096 Refresh Cycles / 64ms (15.625us)


Specifications

Symbol	Item	Rating		Units
VIN, VOUT	Input, Output Voltage	-0.3 ~ +3.9		V
VDD, VDDQ	Power Supply Voltage	-0.3 ~ +3.6		V
TOP	Operating Temperature Range	Commercial	0 ~ +70	°C
		Extended	-25 ~ +85
TSTG	Storage Temperature Range	-55 ~ +150		°C
PD	Power Dissipation	1		W
IOS	Short Circuit Current	50		mA

Note:
Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.

Description

The EM488M1644LBA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 2Meg words x 4 banks by 16 bits. All inputs and outputs are synchronized with the positive edge of the clock.

The 128Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 1.8V low power memory system. It also provides auto refresh with power saving / down mode.

Available packages:BGA-54B(8mmx9mmx1.2mm).