EPM7064BTC44-3N

The EPM7064BTC44-3N is a kind of high-density, high-performance device which is  based on Altera's second-generation MAX architecture. Fabricated with advanced CMOS technology,it operates with a 2.5-V supply voltage and provides 600 to 10,000 usable gates,ISP,pin-to-pin delays as fast as 3.5 ns, and counter speeds up to 303.0 MHz.

Features of the EPM7064BTC44-3N are:(1)programmable power-saving mode for 50% or greater power; (2)reduction in each macrocell; (3)fast input setup times provided by a dedicated path from I/O pin to macrocell registers; (4)programmable interconnect array (PIA) continuous routing; (5)structure for fast, predictable performance; (6)configurable expander product-term distribution, allowing up to 32 product terms per macrocell; (7)two global clock signals with optional inversion; (8)programmable power-up states for macrocell registers; (9)6 to 10 pin- or logic-driven output enable signals.

The absolute maximum ratings of the EPM7064BTC44-3N can be summarized as:(1): usable gates are 1,250; (2): macrocells are 64 ; (3): logic array blocks  are 4 ; (4): maximum user I/O pins are  68 ; (5): tPD (ns)  is 3.5 ; (6): tSU (ns) is 2.1 ; (7): tFSU (ns) is 1.0 ; (8): tCO1 (ns) is 2.4 ; (9): fCNT (MHz) is 303.0.