EQ50F100

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (V_DD) ............−0.3V to +2.5V
CML Input/Output Voltage...... -0.3V to (V_DD + 0.3V)
Junction Temperature............... +150°C
Storage Temperature ..........−65°C to +150°C
Lead Temp. (Soldering, 5 sec.)........... +260°C
ESD Rating
HBM, 1.5 k, 100 pF..................>7 kV
EIAJ, 0, 200 pF....................>200V


Thermal Resistance
_JA, No Airflow.................... 54°C/W

The EQ50F100 is a equalizer designed to compensate transmission medium losses and reduce the mediuminduced deterministic jitter. It is optimized for operation from 1Gbps to 6.25Gbps, on printed circuit backplane for up to 30" of FR4 striplines with backplane connectors at both ends. It is code independent, and functioning equally well for short run length, balanced codes such as 8b/10b, commonly used in multiplexed 1.25 Gbps Ethernet Systems.

The EQ50F100 equalizer uses differential CML inputs and outputs with feed-through pin-outs, mounted in a 3 mm x 3 mm 6pin leadless LLP package. It is powered from single 1.8V supply and consumes 85 mW.