FIN24A

The FIN24A allows for a pair of SerDes to interleave data from two different data sources going opposite directions or standard bi-directional interface operation. The bi-directional data flow is controlled through use of a direction (DIRI) control pin. The devices can be configured to operate in a unidirectional mode only by hardwiring the DIRI pin. An internal PLL generates the required bit clock frequency for transfer across the serial link. The FIN24A supports multiple input frequency ranges which are selected by the S1 and S2 control pins. Options exist for dual or single PLL operation dependent upon system operational parameters. The FIN24A has been designed for low power operation and utilizes Fairchild Low Power LVDS interface.The device also supports an ultra low power Power-Down mode for conserving power in battery operated applications.