FPD87208AXA

Features: Reduced Swing Differential Signaling (RSDS) digital bus reduces dynamic power, EMI and bus-width from the timing controller LVDS single pixel input interface system Input clock range from 25 MHz to 85 MHz Drives RSDS column drivers at 170 Mb/s with an 85 MHz clock (Max) BIST Function CMO...

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SeekIC No. : 004343048 Detail

FPD87208AXA: Features: Reduced Swing Differential Signaling (RSDS) digital bus reduces dynamic power, EMI and bus-width from the timing controller LVDS single pixel input interface system Input clock range from ...

floor Price/Ceiling Price

Part Number:
FPD87208AXA
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/1

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Product Details

Description



Features:

Reduced Swing Differential Signaling (RSDS) digital bus reduces dynamic power, EMI and bus-width from the timing controller
LVDS single pixel input interface system
Input clock range from 25 MHz to 85 MHz
Drives RSDS column drivers at 170 Mb/s with an 85 MHz clock (Max)
BIST Function
CMOS circuitry operates from a 2.25V2.75V; 0°C70°C
64 TQFP package with body size 10 mm x 10 mm x



Pinout

  Connection Diagram


Specifications

If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (VDD)                                             −0.3V to +3.0V
DC TTL Input Voltage (VIN)                           −0.3V to (VDD + 0.3V)
DC LVDS Input Voltage (VIN)                         −0.3V to (VDD + 0.3V)
DC Output Voltage (VOUT)                             −0.3V to (VDD + 0.3V)
Junction Temperature                                                          +150°C
Storage Temperature Range
(TSTG)                                                                  −65°C to +150°C
Lead Temperature (TL)
(Soldering 10 sec.)                                                                 260°C
ESD Rating:
HBM:                                                                                          2 kV
MM:                                                                                           200V
(HBM: RZAP = 1.5 k, CZAP = 100 pF,MM: RZAP = 0, CZAP = 200 pF)



Description

The FPD87208AXA is a timing controller that combines an LVDS single pixel input interface with National Reduced Swing Differential Signaling (RSDS™) output driver interface for XGA and Wide XGA resolutions. FPD87208AXA resides on the TFTLCD panel and provides the data buffering and control signal generation for XGA, and Wide XGA graphic modes. The RSDS path to the column driver contributes toward lowering radiated EMI and reducing system dynamic power consumption.

This single RSDS bus FPD87208AXA conveys the 6-bit color data for XGA,and three different WXGA resolutions.


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