MFG:FAIRC Package Cooled:TO-252(DPAK) D/C:09+
MFG: FAIRC
Package Cooled: TO-252(DPAK)
D/C: 09+
Description: These P-Channel enhancement mode power field effect transistors are produced using ...
These P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as automotive, DC/DC converters, and high efficiency switching for power management in portable and battery operated products.
| Symbol | Parameter | FQD7P06 / FQU7P06 | Units |
| VDSS | Drain-Source Voltage | -60 | V |
| ID | Drain Current - Continuous (TC = 25) - Continuous (TC = 100) |
-5.4 | A |
| -3.42 | A | ||
| IDM | Drain Current - Pulsed (Note 1) | -21.6 | A |
| VGSS | Gate-Source Voltage | ±25 | V |
| EAS | Single Pulsed Avalanche Energy (Note 2) | 90 | mJ |
| IAR | Avalanche Current (Note 1) | -5.4 | A |
| EAR | Repetitive Avalanche Energy (Note 1) | 2.8 | mJ |
| dv/dt | Peak Diode Recovery dv/dt (Note 3) | -7.0 | V/ns |
| PD | Power Dissipation (TA = 25) * | 2.5 | W |
| Power Dissipation (TC = 25) - Derate above 25 |
28 | W | |
| 0.22 | W/ | ||
| TJ, TSTG | Operating and Storage Temperature Range | -55 to +150 | |
| TL | Maximum lead temperature for soldering purposes, 1/8"from case for 5 seconds |
300 |
FQD7P06
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