Purchase GS882Z36D, In-stock GS882Z36D From SeekIC.
Part Number: GS882Z36D
Description: The GS882Z18/36B(B/D)-xxxV is a 9Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipeline...
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GS882Z36D
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General Description
GS882Z36D General Description
The GS882Z18/36B(B/D)-xxxV is a 9Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to insert deselect cycles when the device is switched from read to write cycles.
Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mode enable (ZZ) and Output Enable. Output Enable can be used to override the synchronous control of the output drivers and turn the RAM's output drivers off at any time. Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature eliminates complex off-chip write pulse generation required by asynchronous SRAMs and simplifies input signal timing.
The GGS882Z18/36B(B/D)-xxxV may be configured by the user to operate in Pipeline or Flow Through mode. Operating as a pipelined synchronous device, in addition to the rising-edge-triggered registers that capture input signals, the device incorporates a rising edge triggered output register. For read cycles, pipelined SRAM output data is temporarily stored by the edge-triggered output register during the access cycle and then released to the output drivers at the next rising edge of clock.
The GS882Z18/36B(B/D)-xxxV is implemented with GSI's high performance CMOS technology and is available in JEDEC-standard 119-bump BGA and 165-bump FPBGA packages.
GS882Z36D Maximum Ratings
| Symbol | Description | Value | Unit |
| VDD | Voltage on VDD Pins | 0.5 to 4.6 | V |
| VDDQ | Voltage in VDDQPins | 0.5 to 4.6 | V |
| VI/O | Voltage on I/O Pins | 0.5 to VDDQ+0.5 ( 4.6 V max.) | V |
| VIN | Voltage on Other Input Pins | 0.5 to VDD +0.5 ( 4.6 V max.) | V |
| IIN | Input Current on Any Pin | +/20 | mA |
| IOUT | Output Current on Any I/O Pin | +/20 | mA |
| PD | Package Power Dissipation | 1.5 | W |
| TSTG | Storage Temperature | 55 to 125 | |
| TBIAS | Temperature Under Bias | 55 to 125 |
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of this component.
GS882Z36D Features
• NBT (No Bus Turn Around) functionality allows zero wait Read-Write-Read bus utilization; fully pin-compatible with both pipelined and flow through NtRAM™, NoBL™ and ZBT™ SRAMs
• 1.8 V or 2.5 V core power supply
• 1.8 V or 2.5 V I/O supply
• User-configurable Pipeline and Flow Through mode
• ZQ mode pin for user-selectable high/low output drive
• IEEE 1149.1 JTAG-compatible Boundary Scan
• On-chip parity encoding and error detection
• LBO pin for Linear or Interleave Burst mode
• Pin-compatible with 2M, 4M, and 18M devices
• Byte write operation (9-bit Bytes)
• 3 chip enable signals for easy depth expansion
• ZZ Pin for automatic power-down
• JEDEC-standard 119-bump BGA and 165-bump FPBGA packages
• RoHS-compliant 119-bump and 165-bump BGA packages available
• 1.8 V or 2.5 V core power supply
• 1.8 V or 2.5 V I/O supply
• User-configurable Pipeline and Flow Through mode
• ZQ mode pin for user-selectable high/low output drive
• IEEE 1149.1 JTAG-compatible Boundary Scan
• On-chip parity encoding and error detection
• LBO pin for Linear or Interleave Burst mode
• Pin-compatible with 2M, 4M, and 18M devices
• Byte write operation (9-bit Bytes)
• 3 chip enable signals for easy depth expansion
• ZZ Pin for automatic power-down
• JEDEC-standard 119-bump BGA and 165-bump FPBGA packages
• RoHS-compliant 119-bump and 165-bump BGA packages available
GS809C
PDF/DataSheet Download
- Datasheet: GS809C
- File Size: 46098 KB
- Manufacturer: VISAY [Vishay Siliconix]
- Click here to Download
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GS882Z36D Relative Products
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The GS882Z18/36B is a 9Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the need to in...
GS882Z36B
The GS882Z18/36B(B/D)-xxxV is a 9Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the ...
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The GS882Z18/36B(B/D)-xxxV is a 9Mbit Synchronous Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or other pipelined read/double late write or flow through read/single late write SRAMs, allow utilization of all available bus bandwidth by eliminating the ...
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