GTL2002DP

Features: • 2-bit bi-directional low voltage translator• Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL, GTL+, LVTTL/TTL and 5 V CMOS levels• Provides bi-directional voltage translation with ...

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SeekIC No. : 004357097 Detail

GTL2002DP: Features: • 2-bit bi-directional low voltage translator• Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V buses which allows direct interface wi...

floor Price/Ceiling Price

Part Number:
GTL2002DP
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

• 2-bit bi-directional low voltage translator
• Allows voltage level translation between 1.0 V, 1.2 V, 1.5 V, 1.8 V,
  2.5 V, 3.3 V, and 5 V buses which allows direct interface with GTL,
  GTL+, LVTTL/TTL and 5 V CMOS levels
• Provides bi-directional voltage translation with no direction pin
• Low 6.5 Ω RDSON resistance between input and output pins(Sn/Dn)
• Supports hot insertion
• No power supply required - Will not latch up
• 5 V tolerant inputs
• Low stand-by current
• Flow-through pinout for ease of printed circuit board trace routing
• ESD protection exceeds 2000 V HBM per JESD22-A114,
  200 V MM per JESD22-A115, and 1000 V per JESD22-C101
• Packages offered: SO8, TSSOP8 (MSOP8), VSSOP8



Application

• Any application that requires bi-directional or unidirectional
   voltage level translation from any voltage between 1.0 V and 5.0 V
   to any voltage between 1.0 V and 5.0 V

• The open drain construction with no direction pin is ideal for
   bi-directional low voltage (e.g., 1.0 V, 1.2 V, 1.5 V, or 1.8 V)processor I
   2C port translation to the normal 3.3 V or 5.0 V I2C-bus
   signal levels or GTL/GTL+ translation to LVTTL/TTL signal levels.



Pinout

  Connection Diagram


Specifications

SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VSREF
DC source reference voltage
0.5 to +7.0
V
VSREF
DC drain reference voltage
0.5 to +7.0
V
VGREF
DC gate reference voltage
0.5 to +7.0
V
VSn
DC voltage Port Sn
0.5 to +7.0
V
VDn
DC voltage Port Dn
0.5 to +7.0
V
IREFK
DC diode current on reference pins
VI < 0 V
50
mA
ISK
DC diode current Port Sn
VI < 0 V
50
mA
IDK
DC diode current Port Dn
VI < 0 V
50
mA
IMAX
DC clamp current per channel
Channel in ON-state
±128
mA
Tstg
Storage temperature range
65 to +150



Description

The Gunning Transceiver Logic - Transceiver Voltage Clamps(GTLTVC) provide high-speed voltage translation with lowON-state resistance and minimal propagation delay. The GTL2002 provides 2 NMOS pass transistors (Sn and Dn) with a common gate(GREF) and a reference transistor (SREF and DREF). The GTL2002 allows bi-directional voltage translations between 1.0 V and 5.0 Vwithout use of a direction pin.

When the Sn or Dn port is LOW the clamp is in the ON-state and alow resistance connection exists between the Sn and Dn ports.Assuming the higher voltage is on the Dn port, when the Dn port ishigh, the voltage on the Sn port is limited to the voltage set by thereference transistor (SREF). When the Sn port is high, the Dn port ispulled to VCC by the pull up resistors. This functionality of GTL2002 allows aseamless translation between higher and lower voltages selected bythe user, without the need for directional control.

All transistors of GTL2002 have the same electrical characteristics and there isminimal deviation from one output to another in voltage orpropagation delay. This is a benefit over discrete transistor voltagetranslation solutions, since the fabrication of the transistors issymmetrical. Because all transistors in the device are identical,SREF and DREF can be located on any of the other two matchedSn/Dn transistors, allowing for easier board layout. The translator'stransistors GTL2002 provides excellent ESD protection to lower voltagedevices and at the same time protect less ESD resistant devices.




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