HC6094

Features:

• 14-Bit 5 MSPS DAC
• Programmable Gain Stages
• Anti-Aliasing and Reconstruction Filters


Application

• FDM DMT ADSL
• CAP ADSL
• EC DMT ADSL
• Communications Receiver


Pinout




Specifications

Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . ±5.5V
Analog Input Voltage to Ground . . . . . . . . . . . .VDD +0.5, VSS -0.5V
Digital Input Voltage to Ground. . . . . . . . . . . . . . ..VDD +0.5V, -0.5V


Description

The HC6094 performs the Analog processing for the ADSL chip set. The transmit chain has a 14 Bit DAC, a third-order Chebyshev reconstruction filter and a programmable attenuator (-12 to 0dB) capable of driving a 220W differential load.

The HC6094 receiver chain has a high impedance input stage, programmable gain stage (0 to 24dB), additional programmable gain (-9 to 18dB) and a third-order Chebyshev anti-aliasing filter for driving an off-chip A/D.

Laser trimmable thin-film resistors are used to set the filter cutoff frequency and DAC linearity. The transmit and receive signal chains of HC6094 are specified at 65dB MTPR.