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Part Number: HCS86MS
Description: The Intersil HCS86MS is a Radiation Hardened Quad 2-Input Exclusive OR Gate. A high on any one input exclusively wi...
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HCS86MS
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DataSheet
General Description
HCS86MS General Description
The Intersil HCS86MS is a Radiation Hardened Quad 2-Input Exclusive OR Gate. A high on
any one input exclusively will change the output to a High state.
The HCS86MS utilizes advanced CMOS/SOS technology toachieve high-speed operation.
This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family with
either TTL or CMOS input compatibility.
The HCS86MS is supplied in a 14 lead Weld Seal Ceramicflatpack (K suffix) or a Weld Seal
Ceramic Dual-In-Line Package(D suffix).
HCS86MS Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . . . ..-65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance JA JC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
Input Voltage Range, All Inputs . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . . . ..-65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance JA JC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . 116oC/W 30oC/W
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
HCS86MS Features
•3 Micron Radiation Hardened SOS CMOS
•Total Dose 200K RAD (Si)
•SEP Effective LET No Upsets: >100 MEV-cm2/mg
•Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day(Typ)
•Dose Rate Survivability: >1 x 1012RAD (Si)/s
•Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
•Latch-Up Free Under Any Conditions
•Military Temperature Range: -55oC to +125oC
•Significant Power Reduction Compared to LSTTL ICs
•DC Operating Voltage Range: 4.5V to 5.5V
•Input Logic Levels
-VIL = 30% of VCC Max
-VIH = 70% of VCC Min
•Input Current Levels Ii 5µA at VOL, VOH
•Total Dose 200K RAD (Si)
•SEP Effective LET No Upsets: >100 MEV-cm2/mg
•Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day(Typ)
•Dose Rate Survivability: >1 x 1012RAD (Si)/s
•Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
•Latch-Up Free Under Any Conditions
•Military Temperature Range: -55oC to +125oC
•Significant Power Reduction Compared to LSTTL ICs
•DC Operating Voltage Range: 4.5V to 5.5V
•Input Logic Levels
-VIL = 30% of VCC Max
-VIH = 70% of VCC Min
•Input Current Levels Ii 5µA at VOL, VOH
HCS86MS Connection Diagram
HCS86MS
PDF/DataSheet Download
- Datasheet: HCS86MS
- File Size: 180868 KB
- Manufacturer: INTERSIL [Intersil Corporation]
- Click here to Download
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