HCTS86MS

Features: •3 Micron Radiation Hardened SOS CMOS•Total Dose 200K RAD (Si)•SEP Effective LET No Upsets: >100 MEV-cm2/mg•Single Event Upset (SEU) Immunity < 2 x 10-9Errors/Bit-Day(Typ)•Dose Rate Survivability: >1 x 1012RAD (Si)/s•Dose Rate Upset >1010RA...

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SeekIC No. : 004359982 Detail

HCTS86MS: Features: •3 Micron Radiation Hardened SOS CMOS•Total Dose 200K RAD (Si)•SEP Effective LET No Upsets: >100 MEV-cm2/mg•Single Event Upset (SEU) Immunity < 2 x 10-9Errors...

floor Price/Ceiling Price

Part Number:
HCTS86MS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/12/4

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Product Details

Description



Features:

•3 Micron Radiation Hardened SOS CMOS
•Total Dose 200K RAD (Si)
•SEP Effective LET No Upsets: >100 MEV-cm2/mg
•Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day(Typ)
•Dose Rate Survivability: >1 x 1012RAD (Si)/s
•Dose Rate Upset >1010RAD (Si)/s 20ns Pulse
•Latch-Up Free Under Any Conditions
•Military Temperature Range: -55oC to +125oC
•Significant Power Reduction Compared to LSTTL ICs
•DC Operating Voltage Range: 4.5V to 5.5V
•LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
•Input Current Levels Ii 5µA at VOL, VOH



Pinout

  Connection Diagram  Connection Diagram


Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . .  . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . . . . .-65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . . . . .+265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance                                                      JA                 JC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74oC/W24oC/W
Ceramic Flatpack Package . . . . . . . . . . . . .    . . .  . . . 116 oC/W30oC/W
o
Maximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . .  . . . . . . .. . . . . . . . . . . . .  .0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . .. .  . . . . . .  . . . .. .0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . .  .8.6mW/oC




Description

The Intersil HCTS86MS is a Radiation Hardened Quad 2-InputExclusive OR Gate.A high on any one input exclusively will change the output to a High state.

The HCTS86MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radia-tion hardened, high-speed, CMOS/SOS Logic Family.

The HCTS86MS is supplied in a 14 lead Ceramic flatpack(K suffix) or a SBDIP Package (D suffix). 




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