Features: •3 Micron Radiation Hardened SOS CMOS•Total Dose 200K RAD (Si)•SEP Effective LET No Upsets: >100 MEV-cm2/mg•Single Event Upset (SEU) Immunity < 2 x 10-9Errors/Bit-Day(Typ)•Dose Rate Survivability: >1 x 1012RAD (Si)/s•Dose Rate Upset >1010RA...
HCTS86MS: Features: •3 Micron Radiation Hardened SOS CMOS•Total Dose 200K RAD (Si)•SEP Effective LET No Upsets: >100 MEV-cm2/mg•Single Event Upset (SEU) Immunity < 2 x 10-9Errors...
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Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . . . . .-65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . . . . .+265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance JA JC
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74oC/W24oC/W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . 116 oC/W30oC/W
oMaximum Package Power Dissipation at +125oC Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. .0.43W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13.5mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . . .8.6mW/oC
The Intersil HCTS86MS is a Radiation Hardened Quad 2-InputExclusive OR Gate.A high on any one input exclusively will change the output to a High state.
The HCTS86MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radia-tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS86MS is supplied in a 14 lead Ceramic flatpack(K suffix) or a SBDIP Package (D suffix).