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HD64F2633

Features: The H8S/2600 CPU has the following features.• Upward-compatible with H8/300 and H8/300H CPUs Can execute H8/300 and H8/300H object programs• General-register architecture Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bitr...

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SeekIC No. : 004360299 Detail

HD64F2633: Features: The H8S/2600 CPU has the following features.• Upward-compatible with H8/300 and H8/300H CPUs Can execute H8/300 and H8/300H object programs• General-register architectu...

HD64F2633 Data Sheet

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Part Number:
HD64F2633
Supply Ability:
5000

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  • 1~5000
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Product Details

Description



Features:

The H8S/2600 CPU has the following features.
• Upward-compatible with H8/300 and H8/300H CPUs
 Can execute H8/300 and H8/300H object programs
• General-register architecture
 Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit
registers)
• Sixty-nine basic instructions
 8/16/32-bit arithmetic and logic instructions
 Multiply and divide instructions
 Powerful bit-manipulation instructions
 Multiply-and-accumulate instruction
• Eight addressing modes
 Register direct [Rn]
 Register indirect [@ERn]
 Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
 Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
 Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
 Immediate [#xx:8, #xx:16, or #xx:32]
 Program-counter relative [@(d:8,PC) or @(d:16,PC)]
 Memory indirect [@@aa:8]
• 16-Mbyte address space
 Program: 16 Mbytes
 Data: 16 Mbytes (4 Gbytes architecturally)
• High-speed operation
 All frequently-used instructions execute in one or two states
 Maximum clock rate: 25 MHz (H8S/2633, H8S/2633F, H8S/2632, H8S/2631),
28 MHz (H8S/2633R, H8S/2695)
 8/16/32-bit register-register add/subtract: 40 ns (25 MHz), 35 ns (28 MHz)
 8 * 8-bit register-register multiply: 120 ns (25 MHz), 105 ns (28 MHz)
 16 ÷ 8-bit register-register divide: 480 ns (25 MHz), 420 ns (28 MHz)
 16 * 16-bit register-register multiply: 160 ns (25 MHz), 140 ns (28 MHz)
 32 ÷ 16-bit register-register divide: 800 ns (25 MHz), 700 ns (28 MHz)
• Two CPU operating modes
 Normal mode*
 Advanced mode
Note: * Not available in the H8S/2633 Group.
• Power-down state
 Transition to power-down state by SLEEP instruction
 CPU clock speed selection




Specifications

Item Symbol Value Unit
Power supply voltage VCC
PLLVCC
 0.3 to +4.3 V
PVCC1,2 0.3 to +7.0
Input voltage (XTAL, EXTAL,
OSC1, OSC2)		 Vin 0.3 to VCC + 0.3 V
Input voltage (ports 4 and 9) Vin 0.3 to AVCC + 0.3 V
Input voltage (except XTAL,
EXTAL, OSC1, OSC2, ports 4
and 9)		 Vin 0.3 to PVCC +0.3 V
Reference voltage Vref 0.3 to AVCC + 0.3 V
Analog power supply voltage AVCC 0.3 to +7.0 V
Analog input voltage VAN 0.3 to AVCC + 0.3 V
Operating temperature Topr Regular specifications:
20 to +75
Wide-range specifications:
40 to +85
Storage temperature Tstg 55 to +125
Caution: Permanent damage to the chip may result if absolute maximum rating are exceeded.




Description

The H8S/2600 CPU is a high-speed central processing unit with an internal 32-bit architecture that is upward-compatible with the H8/300 and H8/300H CPUs. The H8S/2600 CPU has sixteen 16-bit general registers, can address a 16-Mbyte (architecturally 4-Gbyte) linear address space, and is ideal for realtime control.






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