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Description: The H8/300H CPU is a high-speed central processing unit with an internal 32-bit architecture that is u...


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HD64F3068F General Description


The H8/300H CPU is a high-speed central processing unit with an internal 32-bit architecture that is upward-compatible with the H8/300 CPU. The H8/300H CPU has sixteen 16-bit general registers, can address a 16-Mbyte linear address space, and is ideal for realtime control.



HD64F3068F Maximum Ratings

Item Symbol Value Unit
Power supply voltage VCC 0.3 to +7.0 V
Input voltage (FWE)*2 Vin 0.3 to VCC +0.3 V
Input voltage (except for port 7)*2 Vin 0.3 to VCC + 0.3 V
Input voltage (port 7) Vin 0.3 to AVCC + 0.3 V
Reference voltage Vref 0.3 to AVCC + 0.3 V
Analog power supply voltage AVCC 0.3 to +7.0 V
Analog input voltage VAN 0.3 to AVCC + 0.3 V
Operating temperature Topr 20 to +75*3
Storage temperature Tstg 55 to +125

Caution: Permanent damage to the chip may result if absolute maximum ratings are exceeded.
Notes: 1. Do not apply the power supply voltage to the VCL pin. Connect an external capacitor between this pin and GND.
2. 12 V must not be applied to any pin, as this may cause permanent damage to the device.
3. The operating temperature range for flash memory programming/erasing is 0°C to +75°C.



HD64F3068F Features

The H8/300H CPU has the following features.
• Upward compatibility with H8/300 CPU
Can execute H8/300 Series object programs
• General-register architecture
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit registers)
• Sixty-two basic instructions
 8/16/32-bit arithmetic and logic instructions
 Multiply and divide instructions
 Powerful bit-manipulation instructions
• Eight addressing modes
 Register direct [Rn]
 Register indirect [@ERn]
 Register indirect with displacement [@(d:16, ERn) or @(d:24, ERn)]
 Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
 Absolute address [@aa:8, @aa:16, or @aa:24]
 Immediate [#xx:8, #xx:16, or #xx:32]
 Program-counter relative [@(d:8, PC) or @(d:16, PC)]
 Memory indirect [@@aa:8]
• 16-Mbyte linear address space
• High-speed operation
 All frequently-used instructions execute in two to four states
 Maximum clock frequency: 25 MHz
 8/16/32-bit register-register add/subtract: 80 ns
 8 * 8-bit register-register multiply: 560 ns
 16 ÷ 8-bit register-register divide: 560 ns
 16 * 16-bit register-register multiply: 880 ns
 32 ÷ 16-bit register-register divide: 880 ns
• Two CPU operating modes
 Normal mode
 Advanced mode
• Low-power mode
Transition to power-down state by SLEEP instruction


HD64F3068F datasheet

HD6.8M50
PDF/DataSheet Download

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