HD74AC107

Features:

·  Outputs Source/Sink 24 mA
·  HD74ACT107 has TTL-Compatible Inputs


Pinout




Specifications

Item	Symbol	Max	Unit	Condition
Maximum quiescent supply current	ICC	80	A	VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case
Maximum quiescent supply current	ICC	8.0	A	VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C
Maximum ICC/input (HD74ACT365)	ICCT	1.5	mA	VIN = VCC 2.1 V, VCC = 5.5 V, Ta = Worst case

Description

The HD74AC107/HD74ACT107 dual JK master/slave flip-flops have a separate clock for each flip-flop. Inputs to the master section are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The HD74AC107/HD74ACT107 sequence of operation is as follows: 1) isolate slave from master; 2) enter information from J and K inputs to master; 3) disable J and K inputs; 4) transfer information from master to slave.