HD74AC123A

Features:

·  Outputs Source/Sink 24 mA


Pinout




Specifications

Item	Symbol	Max	Unit	Condition
Maximum quiescent supply current	ICC	80	A	VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case
Maximum quiescent supply current	ICC	8.0	A	VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C

Description

Each half of the HD74AC123A features retriggerable capability, complementary dc level triggering and overriding Direct Clear. When a circuit is in the quasi-stable (delay) state, another trigger applied to the inputs (per the Truth Table) will cause the delay period to start again, without disturbing the outputs. By repeating this process, the output pulse period (Q High, Q Low) can be made as long as desired. Alternatively, a delay period can be terminated at any time by a Low signal on CD, which also inhibits triggering. An internal connection from CD to the input gate makes HD74AC123A possible to trigger the circuit by positive-going signal on CD, as shown in the Truth Table. For timing capacitor values greater than 1000 pF, the output pulse width is defined as follows.