HD74AC194

Features:

·  Asynchronous Master Reset
·  Hole (Do Nothing) Mode
·  Outputs Source/Sink 24 mA


Pinout




Specifications

Item	Symbol	Max	Unit	Condition
Maximum quiescent supply current	ICC	80	A	VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case
Maximum quiescent supply current	ICC	8.0	A	VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C

Description

This bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a shift register. HD74AC194 features parallel inputs, parallel outputs, right shift and left shift serial inputs, operating mode control inputs, and a direct overriding clear line. The register has four destinct modes of operation: parallel (broadside) load, shift right (in the direction Q0 toward Q3); shift left; inhibit clock (donothing).

Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode control inputs, S0 and S1, high. The data of HD74AC194 are loaded into their respective flip-flops and appear at the output after the positive transition of the clock input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low. Serial date for this mode is entered at the shift right data input. When S0 is low and S1 is high, data shifts left synchronously and new data is entered at the shifts left serial input. Clocking of the flip-flops is inhibited when both mode control inputs are low. The mode control inputs of HD74AC194 should be changed only when the clock input is high.