Features: · VCC = 2.3 V to 3.6 V· Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)· Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)· High output current ±24 mA (@VCC = 3.0 V)· Bus hold on data inputs eliminates the need for external pullup / pulldown resistors.PinoutSpeci...
HD74ALVCH16374: Features: · VCC = 2.3 V to 3.6 V· Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)· Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)· High output current ±24 mA (@VCC = 3.0 ...
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Features: · High Speed Operation· High Output Current: Fanout of 10 LSTTL Loads· Wide Operating Vo...
Item |
Symbol |
Ratings |
Unit |
Conditions |
Supply voltage |
VCC |
0.5 to 4.6 |
V |
|
Input voltage *1 |
VI |
0.5 to 4.6 |
V |
|
Output voltage *1,2 |
VO |
0.5 to VCC +0.5 |
V |
|
Input clamp current |
IIK |
-50 |
mA |
VI < 0 |
Output clamp current |
IOK |
±50 |
mA |
VO<0 or VO>VCC |
Continuous output current |
IO |
±50 |
mA |
VO = 0 to VCC |
VCC, GND current / pin |
ICC or IGND |
±100 |
mA |
|
Maximum power dissipation at Ta = 55°C (in still air)*3 |
PT |
0.85 |
W |
TSSOP |
Storage temperature |
Tstg |
65 to 150 |
°C |
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
The HD74ALVCH16374 has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at the D inputs meeting set up requirements, are transferred to the Q outputs on positive going transitions of the clock input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. Low voltage and high speed operation of HD74ALVCH16374 is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation.