This HD74HC298 circuit is controlled by the signals word select and clock. When the word select input is taken low word 1 (A1, B1, C1 and D1) is presented to the inputs of the flip-flops, and when word select is high word 2 (A2, B2, C2 and D2) is presented t...
This HD74HC273 contains 8 master-slave flip-flops with a common clock and common clear. Data on the D input having the specified setup and hold times is transferred to the Q output on the low to high transition of the clock input. The clear input when low, s...
The large output drive capability coupled with the 3-state feature make HD74HC257 ideal for interfacing with bus lines in a bus organized system. When the output control input line is taken high, the outputs of all four multiplexers are sent into a high impe...
Each HD74HC245 has an active low enable inputG and a direction control input, DIR. When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HC245 transfers true data from one bus...
The HD74HC244FP is one member of the HD74HC244 family which designed as one kind of octal buffers/line drivers/line receivers (with noninverted 3-state outputs) that has two active low enables and each enable independently controls 4 buffers.
Features of th...
The HD74HC244 is a non-inverting buffer and has two active low enables (1G and 2G). Each enable independently controls 4 buffers.HD74HC244 does not have schmitt trigger inputs.