HD74HC648

Features:

·  High Speed Operation: tpd (Bus to Bus) = 14 ns typ (CL = 50 pF)
·  High Output Current: Fanout of 15 LSTTL Loads
·  Wide Operating Voltage: VCC = 2 to 6 V
·  Low Input Current: 1 µA max
·  Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)


Pinout




Specifications

Item	Symbol	Rating	Unit
Supply voltage range	VCC	0.5 to +7.0	V
Input voltage	VIN	0.5 to VCC + 0.5	V
Output voltage	VOUT	0.5 to VCC + 0.5	V
Output current	IOUT	±35	mA
DC current drain per VCC, GND	ICC, IGND	±75	mA
DC input diode current	IIK	±20	mA
DC output diode current	IOK	±20	mA
Power dissipation per package	PT	500	mW
Storage temperautre	Tstg	65 to +150

Description

Six control inputs enable this HD74HC648 to be used as a latched transceiver, unlatched transceiver or a combination of both. As a latched transceiver, data from one bus is stored for later retrieval by the other bus. Alternately real time bus data (unlatched) may be directly transferred from one bus to another.

Circuit operation of HD74HC648  is determined by the Control G, Direction, Clock AB, Clock BA, Select AB, Select BA control inputs. The enable input, Contorl G, controls whether any bus outputs are enabled. The direction control Direction (DIR), determines which bus is enabled, and hence the direction data flows: The Select AB, Select BA inputs cotrol whether the latched data (stored in D type flip-flops), or the bus data (from other bus input pins) is transferred. Each set of flip-flops has its own clock Clock AB and Clock BA, for storing data. Data is latched on the rising edge of the clock.