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HD74LV2GT125A

Features: • The basic gate function is lined up as Renesas uni logic series.• Supplied on emboss taping for high-speed automatic mounting.• TTL compatible input level. Supply voltage range : 3.0 to 5.5 V Operating temperature range : 40 to +85°C• Logic-level translate funct...

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SeekIC No. : 004360732 Detail

HD74LV2GT125A: Features: • The basic gate function is lined up as Renesas uni logic series.• Supplied on emboss taping for high-speed automatic mounting.• TTL compatible input level. Supply volta...

HD74LV2GT125A Data Sheet

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Part Number:
HD74LV2GT125A
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• TTL compatible input level.
  Supply voltage range : 3.0 to 5.5 V
  Operating temperature range : 40 to +85°C
• Logic-level translate function
  3.0 V CMOS logic 5.0 V CMOS logic (@VCC = 5.0 V)
  1.8 V or 2.5 V CMOS logic 3.3 V CMOS logic (@VCC = 3.3 V)
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
  All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information


Pinout

Connection Diagram


Specifications

Item Symbol Ratings Unit Test Conditi
Supply voltage range VCC 0.5 to 7.0 V  
Input voltage range *1 VI 0.5 to 7.0 V  
Output voltage range *1, 2 VO 0.5 to VCC + 0.5 V Output : H or L
0.5 to 7.0 VCC : OFF
Input clamp current IIK -20 mA VI < 0
Output clamp current IOK ±50 mA VO < 0 or VO > VCC
Continuous output current IO ±25 mA VO = 0 to V
Continuous current through
VCC or GND		 ICC or Land ±50 mA  
Maximum power dissipation
at Ta = 25°C (in still air) *3		 PT 200 mW  
Storage temperature TSTG 65 to 150 °C  
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and
furthermore no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.


Description

The HD74LV2GT125A has dual bus buffer with 3state output in an 8 pin package. Output is disabled when the associated output enable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be connected to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. The input protection circuitry on HD74LV2GT125A allows over voltage tolerance on the input, allowing the device to be used as a logiclevel translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation of HD74LV2GT125A  is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.




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