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Part Number: HD74LV2GT245A
Description: The HD74LV2GT245A has two buffers with three state output in a 8 pin package. When DIR is high, data i...


Description: The HD74LV2GT245A has two buffers with three state output in a 8 pin package. When DIR is high, data i...
The HD74LV2GT245A has two buffers with three state output in a 8 pin package. When DIR is high, data is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A outputs. The A and B buses are separated by making the enable input (OE) high level. The input protection circuitry on this device allows over voltage tolerance on the input, allowing the device to be used as a logiclevel translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.
| Item | Symbol | Ratings | Unit | Test Conditi |
| Supply voltage range | VCC | 0.5 to 7.0 | V | |
| Input voltage range *1 | VI | 0.5 to 7.0 | V | |
| Output voltage range *1, 2 | VO | 0.5 to VCC + 0.5 | V | Output : H or L |
| 0.5 to 7.0 | VCC : OFF | |||
| Input clamp current | IIK | -20 | mA | VI < 0 |
| Output clamp current | IOK | ±50 | mA | VO < 0 or VO > VCC |
| Continuous output current | IO | ±25 | mA | VO = 0 to V |
| Continuous current through VCC or GND |
ICC or Land | ±50 | mA | |
| Maximum power dissipation at Ta = 25°C (in still air) *3 |
PT | 200 | mW | |
| Storage temperature | TSTG | 65 to 150 | °C |
HD74LV2GT245A
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