HEF4076B

The HEF4076B is a quadruple edge-triggered D-type flip-flop with four data inputs (D₀ to D₃), two active LOW data enable inputs (ED₀ and ED₁), a common clock input (CP), four 3-state outputs (O₀ to O₃), two active LOW output enable inputs (EO₀ and EO₁), and an overriding asynchronous master reset input (MR).

Information on D0 to D3 of HEF4076B is stored in the four flip-flops on the LOW to HIGH transition of CP if both ED₀ and ED₁ are LOW. A HIGH on either ED₀ or ED₁ prevents the flip-flops from changing on the LOW to HIGH transition of CP, independent of the information on D0 to D3. When both EO₀ and EO₁ are LOW, the contents of the four flip-flops are available at O₀ to O₃. A HIGH on either EO₀ or EO₁ forces O₀ to O₃ into the high impedance OFF-state. A HIGH on MR resets all four flip-flops, independent of all other input conditions.