Features: ` Fabricated on Honeywell's RICMOSTM IV Silicon On Insulator (SOI) process
- 0.8mProcess (Leff = .65 m)
` HMX2000 supports 5V operation
` TTL, CMOS, Cold Spare compatible I/O
` 3 or 4 layer metal interconnect
` Compatible with existing HX2000 digital gate arrays
- Sea-Of-Gates flow around embedded cells
- Memory, A/D, D/A and other cores available
` Up to 275,000 gates useable
` Typical gate toggle power 0.6 W/MHz/gate
` Analog on SOI provides 10dB lower substrate noise than bulk CMOS at 1GHz, 25dB lower at 100 MHz
` NMOS Ft = 15 GHz
` CrSi resistor, 2500/square ±20%
- 300 ppm/C temperature coefficient
` Linear Capacitors
- 100ppm/Volt, 0.5fF/m2
` Vt~0.8V
` DMOS: NMOS AND PMOS > 20 Volts Breakdown
` Lateral Bipolar: >20
` Inductors (Metal Spiral) Q~2-5, 2-5nH
` Body terminal fully oxide-isolated from substrate
` Ring Oscillator Speed ~ 150 psec/stage
` Total Dose Hardness > 1M Rad(Si)
` No Latchup
SpecificationsMaximum gate count and I/O ............................275,000 useable gates and 388 signal I/O
Typical delay 2 input NAND ............................270 ps @ 5.0V
I/O interface levels ............................................TTL, CMOS, Schmitt trigger
Typical power consumption, W/MHz/gate....... 0.6 @ 5.0V
Operating temperature range........................... -55 to +125
Minimum Geometry............................................ 0.8 m Drawn/ 0.65 mLeff
Analog supply level .............................................5.0V
NMOS/PMOS Vt matching................................... NMOS - ~ 1.0 mV (large devices)
..........................................................................PMOS - ~ 1.5 mV (large devices)
Poly resistor characteristics................... 250 ppm/, 250A/m RMS current density,100/square±30%
P-well resistor characteristics ......2500 ppm/, 20 A/m RMS current density,-2000 ppm/V, 2500/square,±35%
Linear capacitor characteristics....................... -100 ppm/V, 0.5 fF/m2, 20 ppm/DescriptionThe HMX2000 family of arrays incorporate Mixed Signal capability as an extension of the available HX2000 Gate Array family, fabricated on Honeywell's RICMOSTM IV Silicon On Insulator (SOI) process. The SOI-IV process at Honeywell has performance advantages over bulk silicon CMOS in that 25% to 35% higher speeds can be obtained or up to 30% lower power. The SOI substrate can support a 6X improvement in static noise margins and significantly lower subthreshold leakage current.
Each HMX2000 array design is founded on our proven SOI ASIC library of SSI and MSI logic elements, available core IP (intellectual property), integratable passives, and selectable I/O pads. This family is fully compatible with Honeywell's range of high reliability screening, test and packaging options.Designers can choose from a wide variety of I/O types.
Output buffer options of HMX2000 include 8 drive strengths, CMOS/TTL levels, IEEE 1149.1 boundry scan, pullup/pull-down resistors, and tri-state capability. Input buffers can be selected for CMOS/TTL/Schmitt trigger levels, IEEE 1149.1 boundry scan and pull-up/pull-down resistors. Bi-directional buffers are also available.
HMX2000 Data Sheet
