HPFC-5200 General Description
HPFC-5200 Features
FCP (SCSI) FEATURES
· Up to 32,768 maximum concurrent I/Os
· Up to 8192 commands in the I/O request queue
· One or less interrupts per exchange (initiator mode)
· Simultaneous initiator and target mode
· Byte level addressability on both inbound and outbound data buffers
· Simplified error notification and recovery
PCI
· Compliance to PCI Local Bus Specification, Revision 2.2
· 32-bit or 64-bit selectable, 0-66 MHz PCI backplane
· Burst transfer rate of 528 MBytes/sec (64-bit, 66 MHz)
· Configurable to optimize performance
· Dual address cycle support
· Compliance to ACPI Specification
· Hot plug PCI capable
OTHER
· 16-entry inbound cache for low latency context switching / restore
· Parity protection on all data paths at byte level
· Synchronous SRAM memory support (up to 2 MBytes)
· Flash ROM support for Boot BIOS and SVID
· 32-bit, 66 MHz Secondary Port Interface (SPI)
· For test and debug: JTAG and full internal scan supported; link status pins; and user definable signal pins
· 388-pin Enhanced Plastic Ball Grid Array (EPBGA) package for maximum signal integrity
· Compliance with Hardware Design Guide for Microsoft Windows NT Server, Version 2.0
HPFC-5200 Typical Application
·High-performance host bus adapters
·SCSI bridge
·Embedded subsystems
·Disk arrays
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