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Part Number: I74F113D

 

 

 

 

Description: The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set ...


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I74F113D General Description


The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level at the other inputs.

A high level on the clock (CP) input enables the J and K inputs and data will be accepted. The logic levels at the J and K inputs may be allowed to change while the CP is high and flip-flop will perform according to the function table as long as minimum setup and hold times are observed. Output changes are initiated by the high-to-low transition of the CP.

I74F113D Maximum Ratings

 

(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL
PARAMETER
PARAMETER
UNIT
VCC
Supply voltage
0.5 to +7.0
V
VIN
Input voltage
0.5 to +7.0
V
IIN
Input current
30 to +5
mA
VOUT
Voltage applied to output in High output state
0.5 to VCC
V
IOUT
Current applied to output in Low output state
48
mA
Tamb
Operating free air temperature range Commercial range
0 to +70
Industrial range
40 to +85
Tstg
Storage temperature range
65 to +150

I74F113D Features

• Industrial temperature range available (40°C to +85°C)

I74F113D Connection Diagram

I74F113D  Connection Diagram

I74F113D datasheet

I74F113D
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