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IC41C16100A

Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 1,024 cycles /16 ms• Refresh Mode:RAS-Only, CAS-before-RAS (CBR), and Hidden• JEDEC standard pinout • Single power supply:5V ± 10% (IC4...

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SeekIC No. : 004370338 Detail

IC41C16100A: Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 1,024 cycles /16 ms• Refresh Mode:RAS-Only, CAS...

IC41C16100A Data Sheet

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Part Number:
IC41C16100A
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval: 1,024 cycles /16 ms
• Refresh Mode:RAS-Only, CAS-before-RAS (CBR), and Hidden
• JEDEC standard pinout
• Single power supply:5V ± 10% (IC41C16100A(S)) 3.3V ± 10% (IC41LV16100A(S))
• Byte Write and Byte Read operation via two CAS
• Self Refresh 1024 cycles for S version


Pinout

Connection Diagram


Specifications

Symbol Parameters
Rating
Unit
VT Voltage on Any Pin Relative to GND
5V
3.3V
1.0 to +7.0
0.5 to +4.6
V
VCC Supply Voltage
5V
3.3V
1.0 to +7.0
0.5 to +4.6
V
IOUT Output Current
50
mA
PD Power Dissipation
1
W
TA Commercial Operation Temperature
0 to +70
TSTG Storage Temperature
55 to +125
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.


Description

The ICSI IC41C16100A(S) and IC41LV16100A(S) are 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the 16100 series ideal for use in 16-, 32-bit wide data bus systems.

These features make the IC41C16100A(S) and IC41LV16100A (S) ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.

The IC41C16100A(S) and IC41LV16100A(S) are packaged in a 42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2.




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