ICS8521

Features: • 9 LVHSTL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL• Maximum output frequency ...

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ICS8521 Picture
SeekIC No. : 004371043 Detail

ICS8521: Features: • 9 LVHSTL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL•...

floor Price/Ceiling Price

Part Number:
ICS8521
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/4

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Product Details

Description



Features:

• 9 LVHSTL outputs
• Selectable CLK, nCLK or LVPECL clock inputs
• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL
• Maximum output frequency up to 500MHz
• Output skew: 50ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1.8ns (maximum)
• VOH = 1.2V (maximum)
• 3.3V core, 1.8V output operating supply voltages
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request



Pinout

  Connection Diagram


Specifications

Supply Voltage, VDDx ..................................4.6V
Inputs, VI................................ -0.5V to VDD + 0.5V
Outputs, VO ..............................-0.5V to VDDO + 0.5V
Package Thermal Impedance, JA   ........................47.9°C/W
Storage Temperature, TSTG........................ -65°C to 150°C

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability



Description

The ICS8521 is a low skew, 1-to-9 3.3V Differential- to-LVHSTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8521 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can ccept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulseson the outputs during asynchronous assertion/ assertion of the clock enable pin. Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the ICS8521 ideal for today's most advanced applications, such as IA64 and static RAMs.




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