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ICS85211I

Features: • 2 differential LVHSTL compatible outputs• 1 differential CLK, nCLK input pair• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• Maximum output frequency: 700MHz• Translates any single-ended input signal t...

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SeekIC No. : 004371045 Detail

ICS85211I: Features: • 2 differential LVHSTL compatible outputs• 1 differential CLK, nCLK input pair• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, ...

ICS85211I Data Sheet

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Part Number:
ICS85211I
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 2 differential LVHSTL compatible outputs
• 1 differential CLK, nCLK input pair
• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency: 700MHz
• Translates any single-ended input signal to LVHSTL levels with resistor bias on nCLK input
• Output skew: 30ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 1ns (maximum)
• Output duty cycle: 49% - 51% up to 266.6MHz
• VOH = 1.2V (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature


Pinout

Connection Diagram


Specifications

Supply Voltage, VDD ................ 4.6V
Inputs, VDD ............ -0.5V to VDD + 0.5 V
Outputs, VDD............-0.5V to VDD + 0.5V
Package Thermal Impedance, JA .112.7/W (0 lfpm)
Storage Temperature, TSTG ......-65 to 150


Description

The ICS85211I is a low skew, high performance 1-to-2 Differential-to-LVHSTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input levels.The ICS85211I is characterized to operate from a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the ICS85211I ideal for those clock distribution applications demanding well defined performance and repeatability. For optimal performance, terminate all outputs.




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