ICS8523

Features: • 4 differential 1.8V LVHSTL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL• Maximum...

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ICS8523 Picture
SeekIC No. : 004371049 Detail

ICS8523: Features: • 4 differential 1.8V LVHSTL outputs• Selectable CLK, nCLK or LVPECL clock inputs• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL...

floor Price/Ceiling Price

Part Number:
ICS8523
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/3

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Product Details

Description



Features:

• 4 differential 1.8V LVHSTL outputs
• Selectable CLK, nCLK or LVPECL clock inputs
• CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• PCLK, nPCLK supports the following input types: LVPECL, CML, SSTL
• Maximum output frequency up to 650MHz
• Translates any single-ended input signal to 1.8V LVHSTL levels with resistor bias on nCLK input
• Output skew: 30ps (maximum)
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 1.6ns (maximum)
• 3.3V core, 1.8V output operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request



Pinout

  Connection Diagram


Specifications

Supply Voltage, VDDx ................................4.6V
Inputs, VI ..............................-0.5V to VDD + 0.5V
Outputs, VO ............................-0.5V to VDDO + 0.5V
Package Thermal Impedance, JA ...................... 73.2°C/W
Storage Temperature, TSTG ......................-65°C to 150°C

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.



Description

The ICS8523 is a low skew, high performance 1-to-4 Differential-to-LVHSTL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8523 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the ICS8523 ideal for those applications demanding well defined performance and repeatability.




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